Saturday, June 30, 2012

MSR EEE (Magnetic Stripe Reader End to End Encryption) Implementation

This is a brief article about the SPI communication that I implemented, between the FPGA and the MSR EEE chip. 

3 registers were defined
·         msr_data_reg – 8 bit register
       Used to store data to be written to the device and read from the device
·         msr_control_reg - 8 bit register
       Used to store control information. Used three bits of the register .
       0th bit – write bit
       1st bit – read bit
       2nd bit – chip select bit
·         msr_status_reg – 8 bit register
      Used to store the status of the device. (To check data availability) When data are available, DAV pin of
      the MSR chip goes to logic high.

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